Processeur vidéo programmable pour la téléphonie mobile eISP, une architecture de calcul très basse consommation à faible empreinte silicium pour le traitement vidéo HD.
Category
Journal Article
Authors
Thevenin, M., Paindavoine, M., Letellier, L.
Year
2010
Title
Processeur vidéo programmable pour la téléphonie mobile eISP, une architecture de calcul très basse consommation à faible empreinte silicium pour le traitement vidéo HD.
Journal / book / conference
Revue Technique et Science Informatiques
Abstract
CMOS sensors are more and more integrated in consumer products. The images issued from these sensors need to be digitally processed before being displayed. Today, CMOS sensors are associated to dedicated components, thus maintaining the power consumption to a low level. On the opposite side, the use of dedicated components limits the flexibility of the hardware and prevents the development of platforms able to run newer image processing algorithms. This paper describes eISP, a programmable architecture which presents a computational efficiency, a silicon area and a power consumption suitable for the processing of 1080p HD images inside of a mobile phone.
Issue
29
Volume
2
Pages
225-251
Keywords
eISP, SplitWay, mobile phone, image, embedded, signal, processor, programmable, high définition, HD, low-power, CMOS, CCD, small silicon footprint, high performance.